For Ultrascale+ this may still make sense, as the space savings in embedded applications may be significant. However, I've never seen Versal to fit in that space? In my mind, Versal is useful for larger, power-hungry beasts. Once you're there, you may as well make use of the flexibility of moving all of the RF off chip and therefore being able to more carefully select devices with the required parameters.
emusan 18 hours ago [-]
These are quite often used in defense and space applications where the flexibility of the DSP allows for custom waveform implementations that would otherwise require incredible CPU processing power or small batch ASICs. The versal fabric will only expand the potential use cases even further in these domains. Cost is often lower on the priority list for these as well.
hkwerf 16 hours ago [-]
Yes, I have seen versal, in particular in defense and satcom. However, in just that field, I have also never seen an RFSoC.
I've seen lots of integrated RF transceivers that were tightly coupled to the FPGAs, but not shared on the same SoC.
jdewerd 15 hours ago [-]
Is that because defense doesn't like them or is it because (non-wartime) defense moves on geological timescales and these are "new"?
parsimo2010 14 hours ago [-]
As compact-ish explanation: A "standard" wideband RF system in an EW or RF reconnaissance platform covers between 0-18 GHz (DC up to the Ku band), or at least as much of it as possible (and Ka/mmW becoming common on new systems); and they have challenging requirements compared to a communication system. Communication systems are simpler to design since both sides of the link cooperate and filter out a wide swath of potentially interfering signals, but a military system wants to see as many signals as possible so they can be collected or jammed. It has not been advantageous to use an integrated RFSoC in the past given the requirements. If a company were spending millions of dollars designing a complicated front end, they might as well pick a separate ADC/DAC that maximizes the performance they cared about, rather than go with the "easy" integrated RFSoC option that might not have the absolute best performance. Now the industry is just getting to the point that a system like a direct sampling ADC/DAC integrated into a Versal might be able to process massive bandwidths at high enough bit rates that they can do useful things for military applications; it may actually be worth it now because you can push to really high data rates, and the additional processing might make up for a small loss in ADC/DAC performance. Give it a couple years for these to make it into new designs and get fielded.
So I guess the tl;dr, is that it is not because defense doesn't like integrated packages, they just haven't been worth it considering the design goals. Defense does move slow, but this is more about being able to field "military-grade" solutions that work well in challenging RF environments, and once that is possible the government will start to pay for it.
15155 13 hours ago [-]
Which comparably-priced ADC/DAC ICs are pushing 6 GSPS on 8x8 channels like the $500 (actual price, not fuck-you DigiKey price) RFSoCs?
stephen_g 16 hours ago [-]
Yeah, we got a dev board of one of the higher-end RFSoc chips for a project we were doing in high-frequency trading (on the networking side over microwave), and we had to jump through a bunch of hoops for approval since they are mostly intended for defence.
Lot of phased-array radar and electronic warfare applications.
jauntywundrkind 3 days ago [-]
Crazy amazing RF chip; dunno if anyone else is keeping pace with their, especially at such high levels of integration.
> with production shipments expected to begin in the first half of 2027.
Whoa, that feels wildly far off.
tucnak 20 hours ago [-]
I've been buying dip AMD since mid-2023 hoping that the Xillinx acquisition would finally pay off... eventually, it will. I'm certain of it ;-(
jauntywundrkind 12 hours ago [-]
With the chiplet future here, some interconnect expertise should really really help all the chips.
Hoping to heck we see AMD not rest on the laurels & get good at CXL, start offering on chip UCE Ethernet and UALink interconnect. Also would really like to see on-package USB4 80Gbps; AMD really lead the way with getting good at IO and allowing users to reuse lanes as either PCIe or SATA or uh what was that third... Continuing to offer robust io is something Xilinx folks should be excellent at.
And yeah they should hopefully have a significant cellular revenue stream too! Grow that! It was neat seeing Lattice stop by the OCP EvenStar mailing list to promote their fpgas. Would be great to see similar outreach of Xilinx making visible motions to connect with & be in sync with our planet's better open source cellular efforts too.
https://ocp-all.groups.io/g/ocp-evenstar/message/121
Also bring involved with software is required. Xilinx did great stuff with for example their bpf->fpga compiler nanotube, way before Intel's recent release of the p4->Tofino compiler Intel recently released (now that they are stepping away from Tofino, boo),
https://github.com/Xilinx/nanotube
I'd love to see pushes into the software stack too. How can (another ex-Facebook effort, lol) Magma take advantage of & offload more and more to fpga, doing more cellular and more networking/smartnic? https://www.linuxfoundation.org/press/linux-foundation-conne...
londons_explore 16 hours ago [-]
So the intended market for these are...
Lab gear...?
Does it make sense in anything with higher sales volumes, or would it always make sense to make dedicated silicon with hardware offload for one specific protocol?
5G/6G base stations?
ermir 15 hours ago [-]
The primary use for these is implementing Software-Defined Radios and the primary user of these is the military. SDRs allow jamming resistance, operation in hostile radio zones, and flexible network topologies.
bgnn 8 hours ago [-]
These don't make sense for high volume. They are competing with ADI data converters + FPGA combo on PCBs, which are expensive. Comparable ADI ADCs are 10k+ usd/SKU. Unfortunately for these applications cost and compactness might not be the biggest priority. ADI has great customer support for example, which is really useful while developing such an high end product.
Funny thing is that these ADC/DAC/RF front-ends aren't ghat uncommon. A lot of wireline or wireless SoCs have such high performing blocks, but they aren't general purpose. They are rather optimized for the application and the performance far exceeds this kind of general purpose stuff.
Oh, also, these days one can buy IPs from companies like Socionext or OmniDesign which are in a similar space. These have IPs in 16/7/5nm typically. Anyone willing to spend 30 milion+ usd can have an SDR chip in volume production in like 4-5 years, which is a typical development cycle.
Neywiny 8 hours ago [-]
I have no experience with the last 2 companies you mentioned. Do they have the kind of eFPGA IP I've seen sometimes or do they only make CPU or fixed logic designs? The FPGA in the rfsoc has a lot of logic and DSP resources. It'd be a shame to give that up.
actionfromafar 6 hours ago [-]
TEMPEST spy stuff too maybe?
dezgeg 14 hours ago [-]
5G basestations are on dedicated silicon already.
spacemanspiff01 16 hours ago [-]
Any idea how many channels this is? Just says multi-channel...
For Ultrascale+ this may still make sense, as the space savings in embedded applications may be significant. However, I've never seen Versal to fit in that space? In my mind, Versal is useful for larger, power-hungry beasts. Once you're there, you may as well make use of the flexibility of moving all of the RF off chip and therefore being able to more carefully select devices with the required parameters.
I've seen lots of integrated RF transceivers that were tightly coupled to the FPGAs, but not shared on the same SoC.
So I guess the tl;dr, is that it is not because defense doesn't like integrated packages, they just haven't been worth it considering the design goals. Defense does move slow, but this is more about being able to field "military-grade" solutions that work well in challenging RF environments, and once that is possible the government will start to pay for it.
Lot of phased-array radar and electronic warfare applications.
> with production shipments expected to begin in the first half of 2027.
Whoa, that feels wildly far off.
Hoping to heck we see AMD not rest on the laurels & get good at CXL, start offering on chip UCE Ethernet and UALink interconnect. Also would really like to see on-package USB4 80Gbps; AMD really lead the way with getting good at IO and allowing users to reuse lanes as either PCIe or SATA or uh what was that third... Continuing to offer robust io is something Xilinx folks should be excellent at.
And yeah they should hopefully have a significant cellular revenue stream too! Grow that! It was neat seeing Lattice stop by the OCP EvenStar mailing list to promote their fpgas. Would be great to see similar outreach of Xilinx making visible motions to connect with & be in sync with our planet's better open source cellular efforts too. https://ocp-all.groups.io/g/ocp-evenstar/message/121
Also bring involved with software is required. Xilinx did great stuff with for example their bpf->fpga compiler nanotube, way before Intel's recent release of the p4->Tofino compiler Intel recently released (now that they are stepping away from Tofino, boo), https://github.com/Xilinx/nanotube
I'd love to see pushes into the software stack too. How can (another ex-Facebook effort, lol) Magma take advantage of & offload more and more to fpga, doing more cellular and more networking/smartnic? https://www.linuxfoundation.org/press/linux-foundation-conne...
Lab gear...?
Does it make sense in anything with higher sales volumes, or would it always make sense to make dedicated silicon with hardware offload for one specific protocol?
5G/6G base stations?
Funny thing is that these ADC/DAC/RF front-ends aren't ghat uncommon. A lot of wireline or wireless SoCs have such high performing blocks, but they aren't general purpose. They are rather optimized for the application and the performance far exceeds this kind of general purpose stuff.
Oh, also, these days one can buy IPs from companies like Socionext or OmniDesign which are in a similar space. These have IPs in 16/7/5nm typically. Anyone willing to spend 30 milion+ usd can have an SDR chip in volume production in like 4-5 years, which is a typical development cycle.
As usual, you have to accept a trade-off between different features depending on the number of channels you want.