> Engineering sample silicon for Agilex 27 FPGAs is expected in the second half of 2027.
That's not even a paper launch at this stage.
YakBizzarro 1 hours ago [-]
quite typical with FPGAs. Plus this is the general public announcement. Key customers likely already have samples since a while
ksec 44 minutes ago [-]
Can anyone comment on Altera since they have escaped from Intel ? And how it fares again Xilinx / AMD?
My old perception was still based on pre AMD Xilinx era from 4-5 years ago and Xilinx was basically winning 60-70% market shares as Intel Altera was no where near competitive. ( As usual with any Intel acquisition)
jpgvm 2 hours ago [-]
Hopefully the hard NOC is good this time around. The limitations of the previous series made it mostly useless.
snvzz 4 hours ago [-]
Likely shipping w/o the proper documentation to enable nextpnr and similar tools, as it's tradition in altera.
I will always choose the vendors that do things properly, when they're even an option.
supaflybanzai 3 hours ago [-]
Like which ones? Honest question.
IshKebab 3 hours ago [-]
There aren't any open commercial FPGAs as far as I know. Some have had their bitstream formats reverse engineered though.
That's not even a paper launch at this stage.
My old perception was still based on pre AMD Xilinx era from 4-5 years ago and Xilinx was basically winning 60-70% market shares as Intel Altera was no where near competitive. ( As usual with any Intel acquisition)
I will always choose the vendors that do things properly, when they're even an option.
We're starting to see open source FPGAs but they are miniscule: https://tinytapeout.com/chips/ttihp26a/tt_um_fabulous_ihp_26...
Next best thing? The mature reverse-engineered families nextpnr[0] supports.
0. https://github.com/YosysHQ/nextpnrhttps://github.com/YosysHQ...
And that's not a great option, frankly. GateMate is a strange design with major performance issues, like the lack of a dedicated clock network.